References
1. American National Standard ANSI X3.41-1974, "Code Extension Techniques for use with 7-Bit Code Character Set of American National Standard Code for Information Interchange". PA0 2. American National Standard ANSI X3.64-1979, "Additional Controls for use with American National Standard Code for Information Interchange", pp. 12-22. PA0 3. MLX-16 Communications Handbook, Honeywell Bull Inc., Order No. GA02.
Digital data systems generally have provision for strings of characters to be entered therein, some of which characters may be data characters to be stored in the system's memory in order to be retrieved or operated upon at a later time, and some of which characters may be control characters or members of sequences of control characters which are intended to direct the data processing system or to alter its modes of operation. A common example of such character string entry is represented by a keyboard input device at which an operator might enter arithmetic data for subsequent computation, textual data for subsequent incorporation into a document by a word processing program, or control characters that might direct the system as to what operations are to be performed upon the data.
A typical data processing system would have a central processing unit (CPU), which is the primary seat of intelligence in the system; most systems, in the interests of overall efficiency, have lesser centers of intelligence distributed around the system, typically including a "terminal controller" which might effect the low-level interfacing and control of the aforementioned keyboard input devices. A typical terminal controller of the prior art generally has capability to assemble characters in buffer registers and to transmit buffer register characters to the CPU upon assembling a full character set. Further, a typical prior-art terminal controller has the ability to recognize that a control character has just been entered into the buffer register, and to send the buffer register contents to the CPU regardless of whether it is full in order for the CPU to interpret the control character and to take action accordingly, which might include sending instructions back to the terminal controller instructing it to change its mode of operation.
The transmission of control characters to the CPU and subsequent transmission back to the controller represent load on the system and its transmission buses that could be eliminated if the controller could be equipped with sufficient intelligence and memory capacity to interpret control characters without the intervention of the CPU. This loading problem is compounded when a sequence of control characters must be interpreted--there must be a transmission to the CPU and a transmission back after each character of the sequence. The problem is further compounded by the emergent trend to provide "clusters" of terminals, wherein a single controller is called upon to be the interface between the CPU and a large number of terminals--the considerations mentioned above apply to each terminal, and are replicated by the number of terminals.
While these drawbacks of the prior art may be overcome or reduced by providing terminal controllers with more sophisticated hardware and memory capacity, this approach is not desirable because of the expense it would add to the system.